The present invention relates to a semiconductor integrated circuit, and a technique intended to increase conversion speeds of A/D (analog-to-digital) converter and D/A (digital-to-analog) converter and shorten the conversion times thereof, for example, a technique useful in applications to microcomputers.
In a semiconductor integrated circuit including an A/D converter and D/A converter, especially in a microcomputer, an analog signal entered from the outside is converted into a digital signal in the A/D converter and then supplied to the CPU (central processing unit). In addition, the result of an operation process in the CPU may be converted into an analog signal by the D/A converter to output. Regarding such A/D converter, as a technique for reducing the influence of a previously entered voltage in the places of an analog switch, a sample hold circuit for analog input voltages and an analog multiplexer, there has been known a technique characterized in: an analog switch circuit is constituted by an insulated gate transistor and a voltage follower circuit connected in parallel with the transistor; and when the switch circuit is turned on, the voltage follower is first activated and then the transistor is brought to conduction (see par. 22 of Japanese Unexamined Patent Application Publication JP-A-2002-111461, for example).
Also, there has been known an A/D converter in which a differential-amplifying device is provided between a terminal for supplying a baseline voltage (i.e., reset voltage) and an input gate included by a differential amplifier in a comparison circuit, for the purpose of making smaller the apparent input capacitance of the comparison circuit when viewed from the input side thereby to increase its working speed and decrease power consumption, and in which the differential-amplifying device makes a voltage follower when a switch for feedback turns on in its reset operation (see JP-A-9-321627 (esp. FIG. 1), for example).